CPSC 220, Fall 2018
About the Final Exam


The final exam for this course will be given during the exam period scheduled by the Registrar: Tuesday, December 18 at 7:00 PM. (This is, unfortunately, the very last exam period.)

The exam will be cumulative, with some emphasis on material that we have covered since the second test. It will be six page long, and most people should finish it well before the end of the three-hour final exam period. The exam counts for 20% of your final grade for the course. You can expect the usual sorts of questions: definitions, short-answer questions, longer essays, working with binary and hexadecimal numbers, writing some assembly language code, translating Java/C code into assembly language, and reading code to say what it does. The last page of the exam will be either one long summary essay, covering as much of the course as I can fit into one question, or two shorter summary essays.

The list of ARM assembly instructions that you should be able to use has not changed since the second test, except for adding using the stack pointer in several of those instructions. As for previous tests, I will provide a table of Larc machine language instructions, and a list of ARM instructions.

There will be no questions about the Larc-in-Logisim project in particular, but there might be questions that relate to some of the techniques used (such as how to build an ALU). Similarly, there will be no questions about the Lasm assembler project, but there might be some questions related to how assemblers work in general.

In the last few weeks of the semester, we covered some advanced topics in general terms: pipelining, caching, virtual memory, and parallel processing. I would expect questions on these topics to be mostly definitions and fairly general essay questions, but I could easily see some problems on virtual memory address translation or cache addressing.


Here are some terms and ideas that were covered since the second test:

the stack and the heap
the C function malloc(n) for allocating a block of memory on the heap
working with functions in assembly language
caller-saved registers and callee-saved registers
the stack pointer
using the stack pointer, SP, in ARM instructions
saving the return address on the stack
saving register values on the stack
how the stack is used to implement recursion

what does an assembler do?
labels in assembly language programs
pseudo-instructions in assembly language programs
directives in assembly language programs
the .asciz directive in ARM assembly (and in our Lasm assembler)
the .word directive in ARM assembly (and in our Lasm assembler)

pipelined instruction execution in CPUs
pipelining increases throughput by allowing a faster clock (and why)
pipelining can be implemented by adding memory circuits between function units
     in the CPU data path, to save state between stages in the pipeline
pipeline hazards and pipeline stalls
data hazards:  data needed in one instruction before 
               it has been saved by a previous instruction
solving data hazards by code reordering and by forwarding
control hazards:  after a branch, there is more than one possibility
                  for the next instruction
addressing control hazards with speculative execution and branch prediction

caching in general
the memory hierarchy
memory caches
Level 1 cache, Level 2 cache, maybe Level 3 cache
using separate Level 1 caches for instructions and for data
cache hits and cache misses
locality:  why caching works
temporal locality and spatial locality
spatial locality is used by loading memory into caches in blocks
direct-mapped cache:  every memory block has one possible slot in the cache
addressing for a direct-mapped cache:
     memory address breaks into tag, cache slot number, and offset within block
set-associative cache:  a memory block has a (small) set of possible slots
modifying data in the cache:  write-through caches versus write-back caches

virtual memory
translating virtual memory addresses to physical memory addresses
memory address consists of a page number and an offset within a page
page table: a data structure mapping virtual page numbers to physical page numbers
how virtual memory provides memory protection
       (every process has its own virtual memory with its own page table)
TLB (Translation Lookaside Buffer): a cache for page table entries
coping with limited physical memory:  swapping pages out to disk
page faults

parallel processing
MIMD and SIMD
threads

Here are some important things from earlier in the course:

basic computer components:  CPU, RAM, ALU, registers, PC
ISA (Instruction Set Architecture)
the function of a clock in a computer
bitwise logical operations (AND, OR, NOT) and shifts
assembly language
the Larc model computer and its machine language
the ARMv8 architecture and its assembly language
logic circuits, logic gates, and logical expressions
combinatorial logic circuits and sequential logic circuits
arithmetic circuits
memory circuits:  latches and flip-flops
control wires and control circuits
multiplexors
binary numbers and binary arithmetic
signed and unsigned integers; representing negative integers
floating point numbers and the IEEE 754 standard for 32-bit floats
ARM assembly language programming
parameter passing and return values for functions written in ARM assembly 
calling standard C functions from ARM assembly