CPSC220: Introduction to Computer Architecture (Fall 2014)

Assignment #9

Due at the start of class on Friday, 12/05/2014

Reading and Tools

Your job

Over the past three assignments, you've implemented portions on a simple MIPS datapath to support instruction selection, the register file, and arithmetic/logical operations. Here, we'll finish our simulation:

  1. Control unit. This unit should take as input the upper six bits of each instruction (i.e. the opcode) and output a set of 1-bit signals, per the discussion given in section 4.4 of P&H.

  2. Data memory unit. Provide an abstraction of the components necessary to support the lw and sw operations, so that data is correctly read and written between the registers (in the arithmetic/logic component) and a RAM.

    NOTE: Don't forget that a RAM component in Logisim is only 24-bit addressable, and only by word, not by byte. You should feel free to use the "32/24" hack from my Instruction selection solution.

Extra Credit

Here are some key instructions that are missing from our simple datapath:

  1. mult, div, and mul
  2. mfhi and mflo
  3. bne, bgez, bgtz, blez, and bltz
  4. sll and srl
  5. jr and jal
  6. lui

Extend your simple datapath to implement some or all of these instructions.

To hand in your files: