CPSC 220
Introduction to Computer Architecture

   Department of Mathematics and Computer Science
   Hobart and William Smith Colleges

   Fall 2012.

   Instructor:  David J. Eck  (eck@hws.edu)

   Monday, Wednesday, Friday, 12:20--1:15 PM, Room Gulick 206A
       Lab: Tuesday, 11:55--1:20, Gulick 208

About The Course

Computer architecture studies how computers can be built as complex systems from very simple components. The fundamental question is how to make a physical device that can store and execute programs. Because the structure and function of a computer is intimately tied to the structure of the programs that it can execute, the language in which those programs is written—machine language—is also an important aspect of computer architecture. In fact, the design of the machine language is referred to as the instruction set architecture of the computer. Because people cannot, in practice, write machine language directly, a course in computer architecture will also typically study assembly language and the relationships among machine language, assembly language, and high level programming languages.

In this course, we will start with very simple components, logic gates, and see how to combine them into circuits that can do arithmetic, store data, and control the execution of machine language programs. (Logic gates are themselves made up of even simple components called transistors, but I won't discuss things on that level, except to try, briefly, to convince you that logic gates can be physically realized.) We will study a simplified machine language and assembly language that are based on the MIPS computer architecture. The simple architecture that we will use is called LARC. It was developed by Professor Marc Corliss and has been used at HWS for the past several years. Some readings for the course will be taken from Professor Corliss's LARC manual, and many of the labs will be based on labs from that manual.

The textbook for the course is Computer Organization and Design, by David Patterson and John Hennessy (revised fourth edition, ISBN 9780123747501). This book uses the full MIPS architecture as its primary example, rather than the simplified version that we will use in lab. It is a rather advanced book, and we will cover only parts of it. While there will be readings from most chapters, as well as from appendix C, we will not cover any chapter completely, and in some cases you will read no more than one or two introductory sections. We will cover some topics from the book that will not be covered at all in the lab, or will only be covered in very simplified form. Since this is an introductory course, the goal is to give you a reasonably firm grounding in the basic material, with lab experience to back it up, while at the same time giving you some background in more advanced topics that are central to modern computer architecture, such as pipelining, caching and the memory hierarchy, and parallel processing.

Computer Labs and Assignments

This course has a weekly required lab component. For each lab, there will be one or more exercises for you to turn in, and those exercises will constitute the large majority of homework for the course. On some labs, you will have the option of working with a partner (in a few cases that might even be mandatory), but in most cases, you will be working on your own.

You will program in Java on about five labs. In about three labs, you will work with a program that simulates logic circuits. And in about six, you will program using the LARC assembly language or machine language.

In addition to the labs, there will be some written homework assignments, starting with one on the first day of classes. Grades for labs and written homework will, together, count for 50% of your final grade in the course.

Labs and homework will not ordinarily be accepted late, but you should, of course, discuss it with me if you think that you have a sufficiently good reason for doing so.

Tests, Exam, and Grading

There will be two in-class tests in addition to a final exam. The tests will be given on Friday, September 28 and Friday, November 2. The final exam will take place during the officially scheduled exam time for the course, which is Thursday, December 13, at 7:00 PM. The final exam will be in our regular classroom. Remember that final exams cannot rescheduled; be sure to make your travel plans accordingly!

Your numerical grade for the course will be determined as follows:

             First Test:            15%
             Second Test:           15%
             Final Exam:            20%
             Labs and Assignments:  50%

Attendance, Etc.

I assume that you understand the importance of attending class. While I do not take attendance in every class, I expect you to be present unless circumstances make that impossible. Participation in lab is particularly important, and I do take attendance at lab. If you miss a lab without a good reason, you can still turn in work for that lab, but your grade on the lab will be reduced.

If you miss a test or final exam without an extremely good excuse, you will receive a grade of zero. If you think you have an excuse for missing a test, please discuss it with me, in advance if possible. If I judge that your excuse is reasonable, I will -- depending on the circumstances -- either give you a make-up test, or I will average your other grades so that the missing grade does not count against you. A missed final exam is a much bigger deal; please try to avoid it!

Although it should not need to be said, I expect you to maintain a reasonable level of decorum in class. This means that there is usually no eating or drinking in class. Cell phones are turned off. There is no walking in late or walking in and out of the room during lecture, without a very good reason.

Statement from the CTL

Disability Accommodations: If you are a student with a disability for which you may need accommodations, you should self-identify and register for services with the Coordinator of Disability Services at the Center for Teaching and Learning (CTL), and provide documentation of your disability. Disability related accommodations and services generally will not be provided until the registration and documentation process is complete. The guidelines for documenting disabilities can be found at the following website: http://www.hws.edu/disabilities

Please direct questions about this process or Disability Services at HWS to David Silver, Coordinator of Disability Services, at silver@hws.edu or x3351.

Office Hours, E-mail, WWW

My office is room 313 in Lansing Hall. My office phone extension is 3398. I am on campus most days, and you are welcome to come in anytime you can find me there. My office hours will be posted on my office door and on the course web page. (But note that your office visits are certainly not restricted to my regular office hours!

My e-mail address is eck@hws.edu. E-mail is good way to communicate with me, since I usually answer messages within a day of receiving them. I expect you to be able to receive email at your official HWS email address.

The home page for this course on the World Wide Web is located at http://math.hws.edu/eck/cs220/index_f12.html. This page will contain a weekly guide to the course and links to lab worksheets.

Tentative Schedule

Here is a very tentative schedule for this course. The schedule indicates what I intend to cover. However, this is the first time that I am teaching this course, and I will modify the schedule if necessary, depending on how things go. In this schedule, readings that are not marked as from the LARC manual are from the textbook, Computer Organization and Design.

Dates What's happening
Aug. 27, 29, and 31 Java's bitwise logical operators.
Introduction to computer architecture [Sections 1.1, 1.2].
Introduction to machine and assembly language [Sections 2.1, 2.2].
Lab: Using Java's bitwise logical operators.
Sept. 3, 5, and 7 Introduction to hardware: gates and circuits [Sections C.1, C.2].
LARC's machine and assembly languages [LARC manual, Sections 3, 4].
Binary numbers [Section 2.4].
Lab: Building basic combinational logic circuits (in a simulator).
Sept. 10, 12, and 14 More about machine language [Sections 2.1, 2.2, 2.3, 2.4].
Lab: LARC machine language.
Sept. 17, 19, and 21 Assembly language [Section B.1].
The assembly language for LARC [LARC manual, Sections 5, 6].
Lab: Writing a functional simulator for LARC, in Java.
Sept. 24, 26, and 28 More about assembly language [Sections 2.6, 2.7].
The ALU: Arithmetic in hardware [Sections C.3, C.4].
Test on Friday, September 28.
Lab: LARC assembly language I: basic instructions.
Oct. 1, 3, and 5 More about assembly language [Sections 2.9, 2.10].
Lab: Building an ALU (in a simulator).
Oct. 10 and 12 How to write an assembler [Section 2.11].
There is no class on Monday or Tuesday, because of Fall Break.
Lab: None.
Oct. 15, 17, and 19 Computer arithmetic [Sections 3.1 to 3.5].
Lab: Writing a LARC assembler, in Java
Oct. 22, 24, and 26 Memory circuits and sequential logic [Sections C.7 to C.9]
Lab: LARC assembly language II: extended (macro) instructions.
Oct. 29 and 31; Nov. 2 Subroutines in assembly language [Section 2.8].
Test on Friday, November 2.
Lab: Building memory circuits (in a simulator).
Nov. 5, 7, and 9 How to build a CPU [Sections 4.1, 4.2].
Lab: LARC assembly language III: implementing subroutines.
Nov. 12, 14, and 16 How to write a disassembler.
Control for the CPU [Section 4.3, 4.4].
Lab: Writing a disassembler, in Java.
Nov. 19 Writing a trap handler for LARC.
No class on Wednesday or Friday, because of Thanksgiving break.
Lab: Writing a disassembler, continued.
Nov. 26, 28 and 30 Advanced topic: Pipelined CPU architectures [Section 4.5].
Lab: LARC assembly language IV: writing a trap handler.
Dec. 3, 5, and 7 Advanced topic: Caching and the memory hierarchy. [Sections 5.1, 5.2].
Lab: Exploiting a stack overflow to take over a program.
Dec. 13 Final Exam: Thursday, December 13, 7:00 PM