CPSC 220, Fall 2018
Labs 7 and 8: Larc in Logisim
This week, you will start the construction of a Larc simulation in the Logisim circuit simulation program. You will be working in assigned groups. The folder /classes/cs220/Larc-in-Logisim has a folder for each group. All members of the group have access to that group's folder, so the group can keep all of its work in that folder.
Recall that the simulation will use separate instruction memory and data memory. Next week, I will make available some test programs that can be loaded into the instruction memory, along with the expected result in data memory at the end of each program.
You will continue to work on Larc-in-Logisim in lab next week, and it will be due the following week. I might ask each group to meet with me to present its work and to test the simulation. Even if you split up the work, everyone in the group should be familiar with the entire project and ready to answer questions about the group's work.
Some Notes
Here is a hand-drawn diagram, simular to what I put on the board in class, as a starting point, and here is a scan of the sheet of tables from the first exam.
We have discussed the Larc simulation extensively in class, and I will not repeat the discussion here. But here are some notes about Logisim and the simulation:
- Use the Logisim documentation, available in the "Help" menu, to understand how Logisim and its built-in components work. The "Library Reference" has complete documentation about each individual component.
You can keep your work in several .circ files. One of them will be the main file, which
defines the full Larc simulation. The other files can contain subcircuits that are used
in the simulation. To add the circuits from a file to your main project file, use
the command "Project" / "Load Library" / "Logisim Library". The file will be added at the end of
the list of folders in the upper left section of the Logisim window, and all the circuits from
the file will be listed in that folder and available for use in circuits. I used four extra files in my version, to hold
the ALU, the registers, various utility circuits, and control circuits. The picture at the right
shows the resulting component list in the Logisim window, with util opened to show
the individual circuits that it contains.- You should use a Logisim ROM component to represent the instruction memory. A ROM is very simple, with just an address input and a data output. You should set the number of bits for both address and data to 16. To set the contents of the ROM, right-click and select "Edit". This will allow you to enter values into the entire memory. This will allow you to enter some very simple test programs by hand. You can also load the contents of ROM from a file.
- You can use a Logisim RAM component for the data memory. Set the number of data and address bits to 16. Set its "Data Interface" to "Separate Load and Store Ports." (I don't fully understand the other modes.) You will need to use the RAM's clock input. It is a good idea to attach an input pin to the "clr" input of the RAM; turning on that input will set all the values in the RAM to zero. You might find it useful to do that for testing purposes, to zero the contents of RAM before running the test program.
- Logisim memory components in Logisim are set to "trigger" on the rising clock edge by default. We used the falling clock edge in class. However, it really doesn't make a difference, and I used rising clock edge in my own Larc simulation.
- You should treat any syscall as a halt command. You can implement it by stopping the clock, that is, by stopping the clock output from reaching the RAM and registers. (Feed a "stop-clock" wire together with the clock output, through an AND gate to get the clock signal that you send to all the components, so the components don't see the clock tick when stop-clock is enabled.)
- Remember that you can "poke" a clock component, to turn it on and off by hand. And you can "poke" any wire in the circuit to see what value it is carrying. This will be essential for debugging your work, since you can step though a program and check that all the input and output wires are carrying the values that you expect. Also, it is useful to set the Label property of inputs and outputs on your sub-circuits so that when you add the sub-circuit to the main circuit, hovering over an input or output will show the label.
- The hard parts of the project are designing the control circuits and wiring everything together correctly in the full Larc simulation. I suggest that your group work together on analyzing the control problem and designing the control circuits. For the other sub-circuits, you might be able to divide up the work so that you can do some work individually. However, the organization is all up to you. In any case, you should keep all your files in your common group folder in /classes/cs220/Larc-in-Logisim.
- I might have some more notes next week, after seeing how things go during the first week.
Before next week's lab, I expect the Register File and ALU and at least some of the control circuits to be ready, and the main project file to be started. You should be prepared to show me your work at the start of next week's lab.